This invention relates generally to a method of producing a semiconductor device and, more particularly, to a method of producing a semiconductor device including a thin diffusion layer having low resistance and metallic electrodes and wirings that are electrically connected to the diffusion layer.
As is well known in the art, the thickness of an impurity-doped region of an MIS semiconductor device has been markedly reduced with a remarkable increase in the integration density of the semiconductor device in the past few years. It is expected, for example, that an As-doped region in a 1-mega bit dynamic memory is from about 0.1 to 0.2 .mu.m.
When the impurity-doped region becomes extremely thin as described above, however, the resistance in the surface direction of the impurity-doped region becomes extremely great. The resistance in the surface direction of a 0.1 .mu.m-thick impurity-doped region, for example, is about 100.OMEGA./.quadrature..
Accordingly, the source-drain resistance of the MIS transistor becomes great while the channel conductance becomes small, so that the high speed operation of the transistor becomes difficult.
Since the impurity-doped region is also used as a wiring of the semiconductor device, signal transmission will be retarded if the resistance becomes great as described above and, from this point, too, the high speed operation is impeded.
In a bipolar semiconductor device, too, the thickness (depth) of the emitter is ever-decreasing and is from 0.1 to 0.2 .mu.m at present. In the same way as in the MIS semiconductor device described above, therefore, the high speed operation of the bipolar semiconductor device is impeded. For this reason, it has been strongly desired to decrease the emitter resistance.
Polycrystalline silicon has been widely used in the past for the gate electrode of the MIS semiconductor device and its wirings. As the integration density has been increased, however, the high resistance of the polycrystalline silicon renders a serious problem for the high speed operation of the device, and the use of tungsten, molybdenum or their silicides for the gate electrode and the wirings has been proposed.
When the gate electrode and the wirings are composed of the polycrystalline silicon, direct contact with a silicon substrate has been used widely in order to accomplish high integration density.
Connection of the gate electrode of a load transistor to a driving MOS transistor in an E/D MOS inverter circuit, for example, has been made by direct connection with the silicon substrate.
If the wirings and gate electrode made of Mo or W are directly connected to silicon, however, the metal and silicon cause heterogeneous reaction at the portion where they are in contact with each other, and hence peel off. When the gate electrode made of W or Mo is formed or when the wiring made of W or Mo is used, therefore, it is necessary to avoid the direct contact between the metal and silicon, and this renders a critical problem in order to attain high integration density of the device.